This invention relates generally to addressing a memory of a digital system, and in particular to the method and apparatus for addressing a memory by a set of parameters which specify an addressing sequence within the memory for data arrays.
In many digital processing systems, specially programmed units control the ordering of data access from memories while special purpose interfacing units link up components with different data formatting requirements. The proliferation of special purpose units results in inefficiencies, causing high system development costs, long development times, high programming costs, and high system maintenance costs.
The arithmetic unit (AU) in prior processors usually assisted the processor control unit to sequence data items to the arithmetic section or transform data items into a form appropriate for an operation to be performed; this not only increased the complexity of the control unit, but also interrupted data processing, causing a reduction in processor efficiency. In addition, often the AU is idle while the next instruction is being interpreted. It is desirable to continuously control formatting operations over related data items, like arrays, and to let the AU perform continuous AU functions.
Sometimes special purpose instructions are implemented in digital signal processors to facilitate performing vectormatrix mathematics. Generally, a series of instructions are required to perform a signal processing algorithm using the available special purpose instructions and other instructions for correctly indexing and dimensioning arrays. A higher order language that eliminates the need for ancillary parameters to index and dimension arrays is highly desirable, especially when the hardware required to implement such a language is not prohibitive.
A digital system is provided for accessing a multidimensional array of data in accordance with parameters of an array transformation. A method of generating addressing sequences for accessing a multidimensional array of data in a digital system is provided comprising the steps of interpreting instruction commands, performing arithmetic operations based on the instruction commands, storing data used in the arithmetic operations in a memory means, generating addressing sequences specified by an array transformation of a high-level programming language in accordance with a nested series of a plurality of parameters of the array transformation, for serially accessing all elements of the data array, and transferring the data between the memory means and arithmetic means performing the arithmetic operations as specified by the array transformation.
In accordance with the present invention a digital system is provided comprising means for interpreting instruction commands, means for performing arithmetic operations based on the instruction commands, means for storing a multidimensional data array for the arithmetic operations, the storing means comprising means for generating a plurality of addressing sequences in response to an array transformation of a high-level programming language for serially accessing all elements of the data array, and means for transferring the data between the storing means and the arithmetic operations performing means in accordance with the array transformation.
In accordance with a further feature of the invention a memory is provided comprising, means for storing a multidimensional data array, a plurality of read/write port means, the port means comprises addressing means for transferring all elements of the data array to and from a bus means in accordance with serial addressing sequences specified by an array transformation of a high-level programming language, the addressing means comprises means for generating a plurality of multidimensional indices specified by the array transformation, and switching network and arbitration means coupled between the storing means and the port means for routing data transfers between the storing means and the port means.